Design for power methodology
April 20, 2012
Semiconductor IP Articles Archive - Page 84 of 231
Low power is everywhere
April 19, 2012
Design considerations for power sensitive embedded devices
April 18, 2012
Building predictability into your low-power design flow
April 17, 2012
Enabling High Performance SoCs Through Multi-Die Re-use
April 16, 2012
SoC low-power verification requires a full-chip solution
April 13, 2012
"Early and accurate" power analysis: myth or reality?
April 12, 2012
Automatic C-to-VHDL testbench generation shortens FPGA development time
April 12, 2012
Inside the Xilinx Kintex-7 FPGA: A closer look at the first FPGA to use HKMG technology
April 6, 2012
Opinion: Challenges and techniques to meet power budget in complex systems
April 6, 2012
Overcome signal attenuation, noise and jitter interference challenges in USB 3.0 system design
April 5, 2012
Optimizing performance, power, and area in SoC designs using MIPS multi-threaded processors
April 4, 2012
Encoding H.264 without External DRAM : Power and Quality Comparison
April 2, 2012
2.5D ICs are more than a stepping stone to 3D ICs
March 28, 2012
Unified C-programmable ASIP architecture for multi-standard Viterbi, Turbo and LDPC decoding
March 26, 2012
Adjusting and calibrating out offset and gain error in a precision DAC
March 26, 2012
Building a NAND flash controller with high-level synthesis
March 22, 2012
Integrating audio codecs in next-generation SoCs for smartphones and tablets
March 21, 2012
Virtual Platforms and RPB for faster System Verification
March 19, 2012
FPGAs unleash potential of Flash memory for enterprise applications
March 19, 2012