ElfCore: A 28nm Neural Processor Enabling Dynamic Structured Sparse Training and Online Self-Supervised Learning with Activity-Dependent Weight Update
By Zhe Su and Giacomo Indiveri
Institute of Neuroinformatics University of Zurich and ETH Zurich

Abstract
In this paper, we present ElfCore, a 28nm digital spiking neural network processor tailored for event-driven sensory signal processing. ElfCore is the first to efficiently integrate: (1) a local online self-supervised learning engine that enables multi layer temporal learning without labeled inputs; (2) a dynamic structured sparse training engine that supports high-accuracy sparse-to-sparse learning; and (3) an activity-dependent sparse weight update mechanism that selectively updates weights based solely on input activity and network dynamics. Demonstrated on tasks including gesture recognition, speech, and biomedical signal processing, ElfCore outperforms state-of-the-art solutions with up to 16× lower power consumption, 3.8× reduced on-chip memory requirements, and 5.9× greater network capacity efficiency.
Index Terms—self-supervised learning; dynamic structured sparse training; sparse weight update
To read the full article, click here
Related Semiconductor IP
Related Articles
- A MAC-less Neural Inference Processor Supporting Compressed, Variable Precision Weights
- MultiVic: A Time-Predictable RISC-V Multi-Core Processor Optimized for Neural Network Inference
- Processor forum examines embedded cache, architectures
- Tools for Test and Debug : Comprehensive tool chains needed to debug multiple processor cores
Latest Articles
- Closer in the Gap: Towards Portable Performance on RISC-V Vector Processors
- TTP: A Hardware-Efficient Design for Precise Prefetching in Ray Tracing
- Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA
- A Reconfigurable Multiplier Architecture for Error-Resilient Applications in RISC-V Core
- ObfAx: Obfuscation and IP Piracy Detection in Approximate Circuits