Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
Andre Hassan, Kilopass Technology Inc.
EETimes (10/15/2011 1:17 PM EDT)
With 28nm high-K metal Gate (HKMG) semiconductor production ramping in 2012, system-on-chip (SoC) designers are presented with the silicon real estate and economic incentive to integrate more functionality on-chip. One function that continues to be challenging for on-chip integration is non-volatile memory (NVM) despite its many advantages. At smaller process geometries, especially 28nm HKMG, the challenges to integrating NVM such as flash, pseudo flash, and e-fuse are effectively addressed with an anti-fuse solution.
To read the full article, click here
Related Semiconductor IP
- ReRAM NVM in DB HiTek 130nm BCD
- Universal NVM Express Controller (UNEX)
- NVM MTP EEPROM TSMC 65nm LP 2.5V SVT, SVT/HVT
- NVM MTP EEPROM TSMC 40nm LP 2.5V
- NVM MTP EEPROM TSMC 180nm BCDG2 5V
Related Articles
- Anti-fuse memory provides robust, secure NVM option
- Gate arrays getting a new lease on life
- Embattled gate array players pull out an ace
- Hardware-assisted verification gate counts soar
Latest Articles
- LLM Agent-Based Design of RISC-V CPUs with FPGA-in-the-Loop Evaluation
- Automated Multi-Line Bug Repair Using Model Checker Aided LLMs: A Case Study on RISC-V Processors
- Cryogenic Recharacterization of a Commercial 22 nm FD-SOI Foundry Standard-Cell Library
- A 105 MS/s 4.18 nJ/inference 0.765 mm² Mixed-Signal Streaming ML Engine for Wireless Baseband in 12LP+ FinFET
- Agentic AI for Heterogeneous System Design Across Chip, Scale-Up, and Scale-Out Domains