TSMC Goes Photon to Cloud
Rick Merritt, EETimes
October 4, 2018
The foundry’s update showed area and power gains continue in its leading-edge nodes, but chip speeds are no longer advancing at their historic rate. To compensate, TSMC gave an update on a half-dozen packaging techniques it is developing to speed connections between chips.
To read the full article, click here
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 3.3V Capable GPIO on TSMC 28nm RF HPC+
- 1.2V Thin Oxide GPIO on TSMC 28nm RF HPC+
- LDO Voltage Regulator, 250 mA, TSMC N3P
- LDO Voltage Regulator, Adjustable 0.45 V to 0.9 V Output, 30 mA, TSMC N3P
Related News
- TSMC Boosts 2026 Expansion Budget, Adds $100B to U.S. Investment
- Sony Semiconductor Solutions and TSMC Agreed to Establish Joint Venture for Next-Generation Image Sensors
- ASML and TSMC Announce Initiative to Pioneer Industry Transition to Large-Format Photomasks for High NA EUV
- ASICLAND to Showcase AxHub™ and Mass-Produced Chips at TSMC OIP Forum
Latest News
- Vayavya Labs and Tenstorrent Partner to Accelerate RISC-V Hardware and Software Development Through Virtual Platform Modeling
- RaiderChip’s Edge NPU reaches more than 50 Generative AI Models with the addition of Qwen3.8-27B
- Aion Silicon Named Design Solution Associate in New Rapidus CORE Ecosystem for 2nm Semiconductors
- Arteris Wins Funding to Expand Hardware Design Supply Chain Security Assurance for the Trusted and Assured Microelectronics Program
- UMC Reports Sales for September 2026