Zephyr 4.0 Now Available for SCR RISC-V IP
July 17, 2025 -- Syntacore, a RISC-V processor IP and software tools specialist, announces full support for Zephyr 4.0 Real-Time Operating System (RTOS) across its entire SCR RISC-V IP portfolio. The Zephyr OS comes pre-configured and tested specifically for SCR cores, enabling developers to deploy real-time embedded applications with minimal effort. The operating system is ready to use out-of-the-box, seamlessly supports multi-core configurations, and is consistently maintained with regular updates and professional technical support available.
The Zephyr RTOS is now available for download via Syntacore’s repository.
For commercial inquiries and technical details, please contact our sales/FAE team.
Related Semiconductor IP
- High-performance Linux-capable application core with a 12-stage dual-issue out-of-order pipeline, a VPU, cache coherency, and a hypervisor
- High-performance microcontroller core with a 12-stage dual-issue out-of-order pipeline and a high performance FPU
- High-performance Linux-capable application core with a 12-stage dual-issue out-of-order pipeline, and cache coherency
- Efficient microcontroller core with a 5-stage in-order pipeline, privilege modes, an FPU, an MPU, L1 and L2 caches
- Open-source compact microcontroller core with a 4-stage in-order pipeline for deeply embedded applications
Related News
- Syntacore's SCR RISC-V IP Now Supports Zephyr 4.3
- Syntacore upgrades its SCR RISC-V IP: Packed-SIMD, Zicond and Zimop Extensions
- Creonic Releases Updated SDA OCT IP Core Supporting OCT 4.0 and Enhanced Synchronization
- LTSCT and Andes Technology Sign Strategic IP Licensing Master Agreement to accelerate RISC-V Based Advanced Semiconductor Solutions
Latest News
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology
- MIPI A-PHY To Power Industry’s First Four-Company Automotive SerDes Interoperability Demonstration at AutoSens USA