SiFive Sets New Bar for High-Performance RISC-V with Third-Generation Performance P550 and P570 IP

New high-performance OoO superscalar vector processor IP, ideal for area- and power-constrained consumer applications

SANTA CLARA, Calif. – May 12, 2026 – SiFive, Inc., the gold standard for RISC-V computing, today announced the launch of the SiFive Performance™ P570 Gen 3, the most powerful and efficient out-of-order processor core in its class. Purpose-built for demanding edge AI, high-end consumer, and commercial IoT applications, the P570 Gen 3 delivers a large leap in performance compared to the popular P550 Gen 1, and also provides the most modern RVA23 ISA profile support.

This versatile IP can be used as the control processor in embedded IoT devices, running a full networking stack, or can be used as the main applications processor in consumer devices, running rich OSs, such as Android or enterprise-grade Linux. The high-performance vector unit supports running AI models and inference on edge devices.

"The P570 Gen 3 is built to meet the demands for today’s most demanding consumer and commercial applications," said Krste Asanovic, SiFive co-Founder and Chief Architect. “With world-class RVA23 capabilities, the new P570 IP will meet next-generation customer requirements for high performance with leading area and power efficiency. This enables tremendous new possibilities coupled with the capability to work most of the major operating systems.”

Industry-Leading Performance and Efficiency

The P570 Gen 3 introduces significant architectural improvements, featuring a 3-wide, 13-stage fully out-of-order superscalar execution pipeline and an upgraded vector engine.

• Traditional CPU workloads: 7- 13% performance improvement on SpecInt 2006-2017 combined with a 13% reduction in dynamic power vs. P550 Gen 1.
• Modern AI CPU workloads: The 128-bit VLEN vector pipeline delivers a 2X increase in Geekbench and up to 21X more performance in specific AI-relevant workloads vs. Gen 1, and up to 4.5X vs. Gen 2, utilizing specialized dot-product instructions to accelerate convolution and matrix-multiply operations.

More Than Just the Core

SiFive also provides a complete solution around the P570 core including system IP, such as the RISC-V standard-compliant advanced interrupt architecture (AIA), WorldGuard to support trusted execution environments on secure SoCs, and a second-generation RISC-V standard-compliant IOMMU. P570 Gen 3 is also scalable up to 16 cores in a compute subsystem.

Explore CPU IP:

• Performance P570 Gen 3
• Performance P550 Gen 3

A New Baseline for RISC-V Standardization

The P570 Gen 3 is fully compliant with the RVA23 profile (backed by major ecosystem players, including Google, Red Hat, and Canonical), providing software developers with a stable, consistent set of instructions and ensuring the P570 is ready for mainstream application development. As well as supporting all the RVA23 mandatory requirements, including the Hypervisor (H) and Vector (V) extensions, the P570 includes optional extensions for enhanced security and management, and support for FP16 and BF16 to accelerate modern AI workloads. The additional security features include secure branch prediction and RISC-V standard Vector Crypto (both NIST and SM) and Enhanced Protected Memory (smepmp) extensions.

The P570 is available today and we are working with customers in several market segments.

The P570 is ideal for use cases requiring high-performance and power efficiency in a small area budget. For customers with very strict area constraints who don’t require vectors, the updated P550 Gen 3 provides a highly efficient RVB23-compatible core.

• Download the P570 product brief
• Learn more about the SiFive Performance™ P570 Gen 3.

SiFive 3rd Gen Performance P500 Series Introduction

Partner Support:

Canonical

“Canonical has led in making RISC-V a first-class citizen, and the launch of the SiFive Performance™ P570 Gen 3 is a pivotal moment for the ecosystem,” said Cindy Goldberg, VP Cloud and Silicon Partnerships at Canonical. “By aligning with the RVA23 profile, the P570 leverages the standardized foundation provided by Ubuntu 26.04 LTS, ensuring that P570 adopters have access to enterprise-grade long-term support, security and stability.”

Imagination Technologies

“A GPU is a must-have for any consumer and embedded SoC looking to deliver great visual experiences," said Markus Mosen, CEO at Imagination Technologies. "Our long‑standing collaboration with SiFive means that P570 Gen 3 customers can rely on proven RISC-V CPU and GPU combinations that integrate seamlessly and shorten time to market.”

Lauterbach

“Lauterbach was an early supporter of RISC-V and continues to actively contribute to its standardization through RISC-V International, with a long track record of supporting processors from SiFive,” said Rolf Kühnis, Strategic Technical Alliance Manager, Lauterbach. “Leveraging the same debug interface as the earlier generations of Performance processors provides a seamless path for existing users to adopt the new P570 Gen 3 IP, while offering a low-risk migration path to RISC-V for new customers.”

Red Hat

"Red Hat and SiFive share a mutual commitment to enabling the developer community. This latest milestone further underscores how SiFive continues to drive innovation in the RISC-V ecosystem. Their dedication to the RVA23 profile, showcased in the new P570 Gen 3, provides a stable, consistent foundation that is essential for accelerating mainstream application development and the future adoption of RISC-V." – Ronald Pacheco, Senior Director of Red Hat Enterprise Linux Product & Ecosystem Strategy, Red Hat.

RISCstar

RISCstar is actively collaborating with SIFive and the RISC-V Software Ecosystem (RISE) to upstream a full-featured implementation of OP-TEE for RISC-V“ said Joe Bates, CEO of RISCstar, “We’re proud of our work with SiFive building an optimized TEE for the P570 Gen 3 that supports secure, scalable deployments across embedded, digital consumer, and industrial Linux use cases and markets.”