Research project looks to repairing working chips
Nicolas Mokhoff, EETimes
3/15/2011 10:36 AM EDT
MANHASSET, NY -- Crisp consortium researchers are demonstrating a self-testing and self-repairing chip at the DATE2011 conference in Grenoble this week.
The consortium consists of a team of four companies and two universities in The Netherlands, Germany, and Finland which is developing a gracefully degrading chip while the IC is still operationally functional.
A run-time resource manager self-repairs the chip and reconfigures the chip's tasks to fault-free parts in real time.
To read the full article, click here
Related Semiconductor IP
- NPU IP
- JPEG XL Encoder
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
Related News
- Virage Logic readies self-repairing embedded memory
- Strategies for Addressing More Complex Custom Chip Design
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era
- lowRISC and SCI Semiconductor Release Sunburst Chip Repository for Secure Microcontroller Development
Latest News
- GF unveils roadmap to deliver the world’s most advanced FD-SOI platform for Physical AI
- GlobalFoundries marks Dresden expansion milestone, announces next-generation platform for Physical AI
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure
- ZLG Selects CAST CAN XL and TSN IP for Next-Generation Vehicle-Network Development and Test Tools