Sanjay Srivastava, Former Denali CEO, Joins Proton Digital Systems as Executive Chairman
San Jose, California – October 25, 2012 – Proton Digital Systems, Inc. (Proton), a leading provider of Flash Memory Reliability IP Solutions, today announced that Sanjay Srivastava has joined its Board of Directors as Executive Chairman. In this role, Sanjay will focus on driving strategic initiatives for Proton. Prior to this appointment, Sanjay was CEO of Denali and most recently SVP of IP at Cadence Design. While at Denali, Sanjay sold the business to Cadence for $315 million.
Proton Digital Systems provides best in class LDPC-based Flash Read Channel IP that drives increased endurance and longevity of Flash Memory. Their IP is currently available for enterprise and consumer grade flash devices and requires 50% less power than comparable solutions.
“The addition of Sanjay to the team is a huge positive for Proton,” says CEO, Andrei Vityaev, “his knowledge of the flash market, IP business, and access to a broad range of strategic partners will clearly generate substantial value for the company.”
Coming changes in smaller denser flash geometries is driving the need for advanced error-free data-retrieval and flash memory management solutions. Proton’s LDPC-based Flash Read Channel, which is available today, has already been adopted by some of the world’s largest flash memory companies.
“Flash memory remains a very hot market,” says Sanjay Srivastava, “and advanced Flash Memory Reliability IP solutions are one of the hottest areas within the Flash Market. Proton’s IP in this area is simply the best in terms of performance, configurability, and power requirements. The day is quickly coming when all flash devices will require this type of solution.”
Founded in 2011, Proton Digital Systems provides advanced strategic IP for the Flash Memory market. The company is based in Silicon Valley and has brought together the best and brightest in the fields of mathematics, signal processing, digital design, and high volume manufacturing to deliver its cutting edge suite of IP Products.
Related Semiconductor IP
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
Related News
- Denali's Sanjay Srivastava Named to EDA Consortium Board of Directors
- Q&A: Denali's Srivastava bridges EDA, IP domains
- World's Largest Semiconductor Memory Conference Highlights Leading-Edge Memory and Storage Solutions
- DDR PHY Interface Specification to be Unveiled Next Week at MemCon
Latest News
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure
- ZLG Selects CAST CAN XL and TSN IP for Next-Generation Vehicle-Network Development and Test Tools
- Vayavya Labs and Tenstorrent Partner to Accelerate RISC-V Hardware and Software Development Through Virtual Platform Modeling
- RaiderChip’s Edge NPU reaches more than 50 Generative AI Models with the addition of Qwen3.8-27B