Huawei & Arm Meet Behind Closed Doors
By Amy Guan, EETimes
September 27, 2019
To read the full article, click here
Related Semiconductor IP
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
Related News
- When Arm Meets RISC-V: SiPearl, Semidynamics to Co-Develop Sovereign AI Platform
- Arm expands AI infrastructure for the agentic era with AGI CPU and Neoverse CSS N4
- Arm introduces new AI-native compute platform built for agentic AI and mobile graphics
- Arm brings the ecosystem together to build and define the next phase of physical AI
Latest News
- Vayavya Labs and Tenstorrent Partner to Accelerate RISC-V Hardware and Software Development Through Virtual Platform Modeling
- RaiderChip’s Edge NPU reaches more than 50 Generative AI Models with the addition of Qwen3.8-27B
- Aion Silicon Named Design Solution Associate in New Rapidus CORE Ecosystem for 2nm Semiconductors
- Arteris Wins Funding to Expand Hardware Design Supply Chain Security Assurance for the Trusted and Assured Microelectronics Program
- UMC Reports Sales for September 2026