Early users of IP cores could gain an edge from design reuse <FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>

IP News

Early users of IP cores could gain an edge from design reuse

NEW ORLEANS-- June 22, 1999 -- Most systems companies are not benefiting from design reuse, and early attempts to adopt the approach are "mostly bad experiences," according to Dataquest Inc. As a result, ASIC vendors and independent design houses — currently the most likely reusers of intellectual property (IP) cores and the widest licensors of IP cores — stand to get the most benefit from design reuse, Dataquest said. As such, these companies could build up a design productivity advantage over systems companies over the next five years.

That was the main gist and conclusions of a presentation made Sunday (June 20) by Jim Tully, principal analyst of EDA trends in Europe for Dataquest, in the research firm's annual presentation on EDA market trends held prior to the opening of the 36th Design Automation Conference here.

Tully said that a lot of companies have started to address software code and hardware core design reuse internally in the hope that it will reduce costs and improve time-to-market. But a Dataquest survey of systems companies showed that "design for reuse is often an unhappy experience," Tully said. "Reuse does pay off eventually, but initially companies are not finding it is any help with time-to-market. That's primarily due to the extra effort that must go into making a core reusable in the first place."

Designing a core for reuse can initially require almost twice as much effort as a core designed for one-time use, but tends to pay-back the initial effort in the second and subsequent uses, Tully said.

Even so, a main problem is that systems companies are not yet supporting design for reuse as a company-wide strategy, and do not have the necessary organization in place to support design reuse, Tully said. "Business units may incur costs [of design for reuse] but are not receiving any benefits," Tully said. As a result, adoption of the approach can be spotty and the advantages lost.

A second, and perhaps more important issue for failing reuse strategies, is the "insufficient reuse opportunities" presented to systems companies, despite their need to produce frequent product iterations, Tully said. "If they don't do enough iterations it means that standards and underlying technologies have changed, negating the need for reuse," he said.

A third reason is that engineers "like to design from scratch," Tully said.

But design reuse by ASIC engineers is increasing, according to a Dataquest survey. The average proportion of an ASIC that is reused from a previous design has increased from 22 percent in 1997 to 33 percent in 1998, the survey found.

Tully went on to say that a systems company each year typically faces eight make-or-buy decisions valued at $200,000 each, but was not yet good at making these decisions.

Tully predicted that ASIC vendors would reuse system-level macros (SLMs) the most, taking it from an average of four uses per SLM in 1998 up to 11 in 2005. By that time, independent design houses would be using each SLM seven times on average, while OEMs would remain stuck at between two or three uses of a core.

Tully concluded that design reuse does not work for everybody. But it could be made more relevant to a broader range of companies, he said, by changing attitudes among managers, and by changing software to automate higher-level hardware-software co-design. But for now, design reuse would likely fall into the hands of ASIC vendors and independent design houses, Tully said.