China's Tsinghua Launches DRAM Unit
By Dylan McGrath, EETimes
July 2, 2019
SAN FRANCISCO — Chinese government-backed Tsinghua Unigroup has established a new DRAM unit in a renewed push to achieve semiconductor independence amid ongoing friction with the U.S.
The new memory unit is led by CEO Charles Kao, chairman of Inotera Memories and former president of Nanya Technology, both of which make DRAM. Kao is also chairman of Yangtze Memory Technology (YMTC), another Tsinghua Unigroup venture attempting to produce NAND flash memory.
To read the full article, click here
Related Semiconductor IP
- Low Latency DRAM Synthesizable Transactor
- Low Latency DRAM Memory Model
- Embedded OTP (One-Time Programmable) IP, 2Kx32 bits for 1.0V/2.6V DRAM
- Embedded OTP (One-Time Programmable) IP, 4Kx32 bits for 1.2V/2.5V DRAM
- DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process
Related News
- UMC retreats from China DRAM venture, Report says
- Intel ASIC unit to focus on comms chips and is building a network of third-party intellectual-property suppliers to support the effort
- Philips Semi, Cadence's Tality unit team up in Bluetooth solutions
- LSI Logic Licenses Synthesizable ARM926EJ-S Core With a Memory Management Unit and Java Support
Latest News
- Imec unlocks fourfold UWB range extension using world-first narrowband receiver chip compliant with IEEE 802.15.4ab standard
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology