Cassia Proposes ‘Better Math’ for AI Efficiency
By Sally Ward-Foxton, EETimes | October 1, 2025

Startup Cassia wants to ‘do math better’ by approximating mathematical functions and implementing these approximations in smaller, more power efficient hardware IP for AI acceleration.
The idea began as a spare time project for Cassia founder and CEO James Tandon after he came across scientific papers from another group that discussed the accuracy loss associated with approximating certain math functions rather than quantizing (reducing numerical precision, which reduces prediction accuracy).
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