Asiczen Releases its CAN Verification IP
October 4, 2016 -- Asiczen Technologies announces the release of its UVM based CAN verification IP. azCAN is fully compliant with CAN specification 2.0. azCAN is a UVM based verification component (UVC) that can be used by IP and SOC makers to test their CAN interface design effectively and quickly.
This easy-to-use UVC can be easily integrated to any UVM based environment and can be used to generate a variety of scenario without much effort. CAN is a multi-master serial bus standard for connecting Electronic Control Units [ECUs] also known as nodes. Two or more nodes are required on the CAN network to communicate.
The complexity of the node can range from a simple I/O device up to an embedded computer with a CAN interface and sophisticated software. The node may also be a gateway allowing a standard computer to communicate over a USB or Ethernet port to the devices on a CAN network.

Related Semiconductor IP
- DC-DC Split-Pi Boost-Buck Converter
- Deep learning accelerator
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
Related News
- TES Launches 3.3 V CAN Transceiver IP for Single‑Chip Solutions
- TES offers CAN Flexible Data-Rate Controller IP Core for System-on-Chip (SoC) Designs
- Arasan acheives the Industry's First ASIL-D Certification for its CAN XL IP Core
- Altium and Bosch extend CAN licensing to FPGAs
Latest News
- Chipsolve Technologies Appoints Balaji Kanigicherla as Chairman of the Board
- OXMIQ Raises $35 Million to Scale OxCore™ Architecture
- SOC-E successfully showcases Time-Sensitive Networking (TSN) application for NGWS/FCAS Remote Carrier (Pillar 3)
- Xiphera Strengthens Its Presence in Japan with the Appointment of Yasuhiro Okumura as Country Manager
- TES offers a new DC-DC Split-Pi Boost-Buck Converter IP in X-FAB XT018-0.18µm BCD-on-SOI CMOS