SoC design in China and the future for 28nm
The state of SoC design in China is a difficult subject to research, but it is a question of vital interest to many designers and managers in the rest of the world. In recent weeks we have seen a couple of data points that suggest an interesting and fluid picture.
One point comes from Open-Silicon, which recently collaborated with two companies from the People's Republic on a very substantial design. The chip was a 100 Mgate wireless networking SoC done in TSMC 65nm CMOS. Virtually all the RTL was developed at Open-Silicon's customer, Shenzhen-based HiSilicon. The physical design was a collaboration between a team of Open-Silicon engineers and a team at Brite Semiconductor in Shanghai.
The second data point comes from Taiwan-based fabless ASIC
house Global Unichip. Director of marketing Keh-Ching Huang says that the company is currently engaged in several 28nm designs planned for tapeout next year. Some of these engagements are with mainland Chinese companies.
To read the full article, click here
Related Semiconductor IP
- TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
- TSMC 65nm 3V3 ESD Local Clamp – Rad Hard
- TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
- TSMC 3nm 3V3 ESD Local Clamp
- TSMC 3nm 1V2 ESD Local Clamp – Low Capacitance
Related Blogs
- How many 28nm FDSOI SoC Design Starts in 2015? In 2020?
- Customer Spotlight: Viettel Accelerates Design of Its First 5G SoC with Synopsys ASIP Designer
- How to Augment SoC Development to Conquer Your Design Hurdles
- 2024 Set The Stage For NoC Interconnect Innovations In SoC Design
Latest Blogs
- Beyond Trusted: What the NSA’s New Guidance Means for Hardware Security
- A scalable, shader-programmable vector graphics GPU core for low-power MCUs
- Navigating ISO 26262 Part 11: A Guide for Semiconductor Architects
- Embedded Security explained: Digital signatures
- Hardware security verification must go beyond functional testing