Delivering a Secure, Cloud-Based SoC Design Environment for Aerospace Chip Designers

By Synopsys, Inc.

November 2, 2022

Chip designs for aerospace and defense applications like satellites, rockets, radars, and submarines need to operate reliably and securely in harsh environments. These SoCs are growing more complex, often with billions of hardware gates and thousands of lines of software code. Additionally, software and hardware are highly intertwined to deliver the lasting performance needed for critical missions.

Through customer use, we have found that the cloud is proving to be an excellent chip design and verification environment, providing the availability of virtually unlimited compute performance, elasticity, and flexibility to get the job done. One of the biggest advantages is the virtually unlimited and advanced compute resources that deliver the capacity chip designers need at peak times, such as when they are trying to meet tapeout deadlines. EDA tool flow and license management have also remained a heavy lift, and the cloud can ease the burden of that effort substantially. Finally, we are also seeing that customers find the cloud to be a great way to evaluate new tools in their already existing flows.

Against this backdrop, Synopsys is collaborating with Microsoft to improve silicon design assurance with secure, cloud-based analog and digital integrated circuit (IC) development environments. This effort is part of the Rapid Assured Microelectronics Prototypes (RAMP) program to deploy hardware design workflows that incorporate Synopsys’ analog and digital design flows with added confidentiality and integrity (C&I) techniques into Microsoft’s Azure government cloud infrastructure.

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