Qualcomm: Scaling down is not cost-economic anymore - so we are looking at true monolithic 3D

By _MonolithIC 3D

June 19, 2014

Over the course of three major industry conferences (VLSI 2013, IEDM 2013 and DAC 2014), executives of Qualcomm voiced a call for monolithic 3D "to extend the semiconductor roadmap way beyond the 2D scaling" as part of their keynote presentations.
Karim Arabi, Qualcomm VP of Engineering, voiced the strongest support and provided many details of monolithic 3D’s role, in his keynote at this year’s DAC. A good summary was posted at the Tech Design Forums site under the title "3D and EDA need to make up for Moore’s Law, says Qualcomm". In this blog I’ll highlight some of the very interesting quotes from Arabi’s keynote: "Qualcomm is looking to monolithic 3D and smart circuit architectures to make up for the loss of traditional 2D process scaling as wafer costs for advanced nodes continue to increase...One of the biggest problems is cost. We are very cost sensitive. Moore’s Law has been great. Now, although we are still scaling down, it’s not cost-economic anymore"

To read the full article, click here