Formally Verifying Processor Security
November 20, 2019
Intel has had a couple of major events that totally changed their attitude to verification. The first was in 1994 when they had the Pentium floating-point divide bug and management said “don’t ever let this happen again”. In 1996, they started proving properties of the Pentium processor FPU.
Then, a couple of years ago, the side-channel vulnerabilities like Spectre were discovered. These didn't just affect Intel, it turned out every modern CPU had the same problem hiding in plain view for 20 years. Basically, the vulnerability plays on speculative execution making memory references and then being able to discover which memory elements were accessed, even though the speculative execution got abandoned.
To read the full article, click here
Related Semiconductor IP
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
- AMBA Bus Host to eSPI Controller
Related Blogs
- Verifying Processor Security, Part 2
- Formally verifying protocols
- Formally verifying AVX2 rejection sampling for ML-KEM
- what made Apple design the A4 processor?
Latest Blogs
- Embedded Security explained: Advanced Encryption Standard (AES)
- Cadence Demonstrates PCIe 8.0 PHY at PCI-SIG DevCon 2026
- Cadence Achieves Successful Silicon Validation of 1st IP Test Chips on Intel 18A
- From Classical CAN and CAN FD to CAN XL: Functional Safety and Security for Next-Generation In-Vehicle Communication
- Accelerating Embedded Memory Performance with 16-bit xSPI PSRAM IP