DVCon India in Pictures
Recently, Bangalore was abuzz with excitement on DVCon' first event in India. Verification engineers FINALLY got centre stage! There was excitement in the air - and why not? It is not everyday that the city gets to host an event like DVCon.
Here are some images that capture the 2 day journey -
Related Semiconductor IP
- NoC Interconnect IP Generator
- Over-Voltage Lockout (OVLO) IP
- Verification IP for Universal Chiplet Interconnect Express (UCIe) up to 3.0
- UCIe-S (Gen2) Compatible PHY for Standard Package (x16) in TSMC N3P, North/South Orientation
- DSP-Based 112G SerDes
Related Blogs
- Some thoughts on VLSI manufacturing in India
- India should focus on developing local electronics industry: ST
- iSuppli raises 2010 foundry forecast; interesting lessons to learn for India from China’s story!
- Outsourcers Look To China, As Obama Goes To India
Latest Blogs
- Building the engine behind Arm’s silicon shift
- M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C
- Understanding security certification and how analog IP can help
- Embedded Security explained: Secure boot for embedded systems
- World's First Standards-Compliant 112G PHY IP for Linear Optics: A Turning Point for AI Interconnects