CEO Interview: Barry Paterson at Agile Analog
Agile Analog is transforming the world of analog IP with Composa™, its innovative, highly configurable, multi-process analog IP technology. Agile Analog has developed a unique way to automatically generate analog IP that meet the customer’s exact specifications, for any foundry and on any process, from legacy nodes right up to the leading edge. The company provides a wide-range of novel analog IP and subsystems for data conversion, power management, IC monitoring, security and always-on IP, with applications including; data centers/HPC, IoT, AI, quantum computing, automotive and aerospace. The digitally wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs, helping to accelerate innovation in semiconductor design.
To read the full article, click here
Related Semiconductor IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
- UCIe 2.x Controller IP
- SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP
- OpenTitan-based RISC-V Secure Element
Related Blogs
- CEO Interview: Xerxes Wania of Sidense
- CEO Interview: Geoff Tate of Flex Logix
- CEO Interview: Charlie Janac of Arteris
- CEO Interview: Charlie Janac of Arteris IP
Latest Blogs
- From Bug Hunting to Engineering Methodology: Lessons from AI-Driven Development
- Manufacturing Intelligence: Turning EDA Data into Trusted Action
- Execute-in-Place: Getting More from Embedded NVM
- Rethinking RTL flows with AI-driven hybrid formal verification
- Arm and NVIDIA: Building the trusted compute foundation for the agentic AI era