Cadence ClosedAccess
September 12, 2011
There are various rumors around about Cadence starting to close up stuff that has been open for a long time. Way back in the midst of time, as part of the acquisition of CCT, the Federal Trade Commission forced Cadence to open up LEF/DEF and allow interoperability of Cadence tools (actually only place and route) I believe for 10 years. Back then Cadence was the #1 EDA company by a long way, in round figures making about $400M in revenue each quarter and dropping $100M to the bottom line. Cadence opened up LEF/DEF and created the Connections Program as a result.
To read the full article, click here
Related Semiconductor IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
- UCIe 2.x Controller IP
- SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP
- OpenTitan-based RISC-V Secure Element
Related Blogs
- Introducing Open Access: SoC design for everyone
- Semidynamics – Customizable RISC-V Technology for the Next Five AI Revolutions
- Symmetric Multiprocessing (SMP) RTOS on Xtensa Multicore
- Dream Chip, Cadence Unveil Automotive SoC with Tensilica IP at embedded world '25
Latest Blogs
- From Bug Hunting to Engineering Methodology: Lessons from AI-Driven Development
- Manufacturing Intelligence: Turning EDA Data into Trusted Action
- Execute-in-Place: Getting More from Embedded NVM
- Rethinking RTL flows with AI-driven hybrid formal verification
- Arm and NVIDIA: Building the trusted compute foundation for the agentic AI era