Cadence Introduces the Industry's First GDDR7 Verification Solution

By Cadence

March 21, 2024

GDDR7 Introduction

In February 2024, JEDEC announced the successor to GDDR6 with many new features and a big leap in terms of operating speed. GDDR7 is a high-speed synchronous graphic DRAM with a semi-independent row and column command address bus and two modes of data signaling: PAM3 for high speed and NRZ for low speed. GDDR memories are used across a wide range of applications that involve high processing rates at much larger scales, such as computers, servers, data centers, etc. With ever-increasing demand for bandwidth with greater power efficiency, GDDR7 is expected to bring these capabilities to the computing world.

New Features Added in GDDR7

Clock

DRAM uses a single Write Clock (WCK) for command-address and data latching, while it generates an internal divide-by-4 clock named CK4 that is used as a reference for latencies.

Read Clock (RCK) in GDDR7 can be configured in four different modes from the mode register:

• Always running: As the name suggests, it is always running and stops during sleep modes.
• Disable: It stops running when configured in this mode.
• Start with RCKStart command: Read Clock can be started by issuing the RCK Start command before reading out data. It can be stopped using the RCK STOP command. Host can start/stop as per requirement.
• Start with Read: Read Clock automatically starts running when DRAM receives any command that involves read data out. Also, it can be stopped here using the RCK STOP command.

With the help of the last two modes, power usage can be optimized by enabling RCK only during the periods when it is needed.

To read the full article, click here