Are common memory protection mechanisms adequate?
In the previous blog post we looked at the ruinous costs of allowing unsafe memory access. However, there are generally existing protection mechanisms that are designed into processors. Can these be relied upon to give adequate protection? We will look at some common mechanisms and consider how effective they are at dealing with common memory-related vulnerabilities.
What is processor integrity?
When we think of integrity problems with processors, we generally think of malicious code injection. For example, loading malware during a boot, installing malware during a firmware update, or importing malicious code from an app or website.
However, not all integrity issues have malicious causes. Corruption of data and program crashes can be the direct result of how software is written. Similarly, not every program should be able to access every processor resource except in the case of simple bare-metal embedded applications.
Various methods are commonly used to address processor integrity, including:
- Chain of trust
- Privilege modes
- Memory protection
- Execution enclaves.
Let’s now briefly consider each of these.
To read the full article, click here
Related Semiconductor IP
- nQrux Secure Boot
- 4K/8K Multiformat IP supporting AV2 decoder
- Ultra Ethernet MAC & PCS 100G/200G/400G/800G
- Ethernet PCS 100G/200G/400G/800G/1.6T
- Ethernet MAC 100G/200G/400G/800G/1.6T
Related Blogs
- Memory Controller IP, battle field where Cadence and Synopsys are really fighting face to face. Today let's have a look at Cadence’s strategy
- Current Embedded Memory Solutions Are Inadequate for 100G Ethernet
- Fine-grained memory protection
- Breakthrough in area efficiency of on-chip ESD protection
Latest Blogs
- A Repeatable Framework for Hardware Security Assurance
- Inside the SiFive Performance™ P570 Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
- What the steam engine can teach us about modern chip design
- Automotive silicon in the era of AI, functional safety, and cybersecurity
- JPEG XS Officially Joins GenICam, The Machine Vision Standard Managed By EMVA