How AI Will Change Chip Design
March 17, 2023
Expert Perspectives on Semiconductor IP and SoC Design Archive - Page 54 of 196
Is your SoC ready for HBM2E - 2x more capacity at 50% more speed
March 15, 2023
Execute Your Hardware Verification Campaign in the Cloud - a Verification Engineer's Perspective
March 15, 2023
Your New "Superpower": See Through "Hand-Off Walls" for Implementation PPA Insights on Early-Stage RTL
March 10, 2023
Why we've levelled up on RISC-V
March 9, 2023
Synopsys Introduces the Industry's First Verification IPs for Arm AMBA 5 AXI-J and APB-E
March 8, 2023
How to Get High-Performance Simulation with Predictable Capacity Uplift in the Cloud
March 8, 2023
Secure software development for modern vehicles
March 7, 2023
Reduce Integration Risks for High-Speed Applications with PCIe 5.0-Compliant Synopsys IP
March 6, 2023
Dynamic Vector Threading for High Efficiency in Fixed Wireless Access, vRAN & Massive MIMO Beamforming
March 6, 2023
Understanding UCIe Design Verification Topologies
March 6, 2023
What is new in LLVM 15?
March 2, 2023
From ChatGPT to Computer Vision Processing: How Deep-Learning Transformers Are Shaping Our World
March 1, 2023
Using Synopsys Smart Monitors to Improve System Performance of Your Arm SoCs
March 1, 2023
China entering a "dark forest", say scientists
February 27, 2023
Building Sustainable 5G Network Infrastructure at Scale
February 27, 2023
Arm Applies Cadence Cerebrus to Optimize PPA of Next-Gen 3nm Core Implementation
February 27, 2023
Ultra Wideband Radar To Drive Digital Key for Safety, Security and Beyond
February 27, 2023
A Primer on Multi-Die Systems
February 24, 2023
Ray tracing and Fragment Shading Rate (FSR) in IMG DXT: a match made in heaven
February 23, 2023