Want 10nm Wafers? That'll Cost You
February 11, 2013
As you know, I've been a bit of a bear about what is happening to wafer costs at 20nm and below. At the Common Platform Technology Forum last week there were a number of people talking about this in presentations and at Harvey Jones's "fireside chat".
At the press lunch I asked about this. There are obviously lots of technical issues to address to get to 10nm and below, and I don't want to underestimate them, but at some point an important question is "at what cost." Historically, with each process generation we have had something like a 50% reduction due to scaling along with a 15% increase in wafer fabrication cost resulting in an overall 35% reduction in cost per transistor.
To read the full article, click here
Related Semiconductor IP
- Zigbee Transceiver PHY
- Data Flow Architecture IP
- AMBA SPI Controller MRAM Controller
- Ethernet MAC
- Protocol Bridges
Related Blogs
- No More Cheap Wafers, says Future Horizons
- How Much Cost Reduction Will 450mm Wafers Provide
- Why do we need 450mm wafers?
- Moore's Law good for 14nm, and probably, 10nm: Dr. Wally Rhines
Latest Blogs
- IDS-NoC: A Scalable Interconnect Solution for Modern SoC Design
- Leading-edge AI IC designs demand comprehensive HAV methodologies
- Beyond the Fab: Building Europe’s Next Generation of Semiconductor Champions
- AI Semiconductor Design at 3nm and 2nm: Silicon-Proven IP
- Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution