Cadence Design Systems, Inc.
•
HQ:
USA
The Ultra Accelerator Link (UALink) Verification IP (VIP) provides a bus functional model (BFM) with integrated automatic protoco…
- Verification IP
Compare 10 UALink IP Listing from 4 vendors
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224G SerDes PHY and controller for UALink for AI systems
Cadence Design Systems, Inc.• HQ: USAEfficient Scaling of AI Accelerators for Achieving High Performance and Throughput UALink, the standard for AI accelerator interc…
- UALink
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Cadence Design Systems, Inc.• HQ: USA
Efficient scaling of AI accelerators is necessary for achieving breakthrough performance and throughput in modern compute environ…
- UALink
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Chip Interfaces ApS• HQ: Denmark
Silicon agnostic and fully compliant Physical Coding Sublayer (PCS) implementation of UALink_200 specification The UA Link PCS IP…
- UALink
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Synopsys, Inc.• HQ: USA
The UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requiremen…
- UALink
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Synopsys, Inc.• HQ: USA
Specifications: UAL_200 1.0 Interfaces: 802.3 dj compliant, UPLI DUT Types/Topology: Protocol TL Phy DL Reconciliation Sub Layer…
- Verification IP
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Synopsys, Inc.• HQ: USA
UALink serves as a critical interface in data centers, designed to facilitate scaling up AI networks enabling high-speed data tra…
- UALink Security
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Innosilicon Technology Ltd• HQ: China
Empowering customers to thrive in the AI Era, INNOSILICON™ introduces its most 112G SerDes (Serializer/Deserializer) and Controll…
- Multi-Protocol PHY
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Chip Interfaces ApS• HQ: Denmark
Silicon agnostic and fully compliant implementation of UALink_200 specification The Chip Interfaces UA Link TL IP Core is a high-…
- UALink
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Chip Interfaces ApS• HQ: Denmark
Silicon agnostic and fully compliant implementation of UALink_200 specification The UA Link DL IP Core is a high-performance, sil…
- UALink