DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency.
- DDR
- In Production
- Immediate
DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency.
Delivers excellent performance in addition to high utilization and ultra-low latency, achieved by its proprietary out-of-scheduli…
High Speed DDR Interface Solution
Brite provides a DDR subsystem including not only controller, PHY and IO, but also corresponding tuning and configuration softwar…
DDR4/ DDR3 Combo PHY IP - 2400Mbps (Silicon Proven in UMC 28HPC+)
The DDR4/3 PHY is compatible with JEDEC DDR3 and JEDEC DDR4 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to 2133Mbps…
DDR4/ DDR3/ DDR3L Combo PHY IP - 1600Mpbs (Silicon Proven in TSMC 28HPC+)
This DDR (Double Data Rate) PHY IP supports DDR3/DDR3L/DDR4, provides low latency, and enables up to 1600Mbps throughput.
High Performance DDR 3/2 Memory Controller IP
This memory controller supports DDR2/3 SDRAM.
DDR 4/3 Memory Controller IP - 2400MHz
This memory controller supports DDR3/4 SDRAM.
DDR3/ DDR3L Combo PHY IP - 1600Mbps (Silicon Proven in UMC 40LP)
This DDR PHY IP(Double Data Rate) supports DRAM type DDR3, DDR3L this PHY provides low latency, and enables up to 1600Mbps throug…
First to market with full DDR5 DIMM support.This Cadence Verification IP (VIP) provides support for the JEDEC DDR5 SDRAM Unbuffer…
DDR DFI Verification IP provides an smart way to verify the DDR DFI component of a SOC or a ASIC.
Our DDR and LPDDR Combo PHY is a versatile and high-performance solution designed to meet the memory interface needs of modern co…
LPDDR4 multiPHY V2 in UMC (28nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR5/4/4X PHY in Samsung (14nm) for Automotive
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and…
LPDDR5/4/4X PHY in TSMC (N7) for Automotive
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and…
LPDDR5/4/4X PHY in TSMC (16nm, 12nm, N7, N6, N5)
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and…
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and…
LPDDR4X multiPHY Plus in GF (12nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR4X multiPHY in TSMC (16nm) for Automotive
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR4X multiPHY in Samsung (14nm, 11nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…