SMIC 0.18um 12-Bit 8 Input 1M/200k SAR ADC
The analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.
- 12 Bit
- SMIC
- 180nm
- G
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SMIC 0.18um 12-Bit 8 Input 1M/200k SAR ADC
The analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.
SMIC 0.13um 3.3V Power On Reset
Present Power on Reset generates system reset pulses (POR33) when the 3.3V power supplier (VIN33) is turned on.
The present IP is a Power On Reset (POR) circuit without any external resistor or capacitor.
SMIC 0.13um 3.3v/1.2v Power Regulator
Present IP devises a NO-CAP regulator which generates 1.2V voltage from 3.3V power supply and provides100mA plus loading current.
This IP is a programmable Analog PLL suitable for generating system clock.
SMIC 0.13um 1.2v/3.3v PLL Specification
This PLL is designed for audio clock generation.
This PLL is designed for audio clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
SMIC 0.13um Crystal Oscillator IO
This IP is a crystal oscillator DUP IO pad designed for low-power consumption applications.
The LVDS transmitter converts 28-bit data into 4-pair LVDS data stream.
The LVDS Receiver IP is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…
VeriSilicon CHRT 0.13um 1.2V/3.3V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufact…
VeriSilicon CHRT 0.13um 1.2V/2.5V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufact…
UMC 0.18um 1.8v 60MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by the external 1.2v bandgap reference.
The 3GPP LTE Channel Encoder performs the 'outer' transmit functions for the Physical Downlink Shared (PDSCH), Multicast (PMCH), …
The 3GPP LTE Channel Decoder provides a high-performance, optimized decode function for the Uplink Shared Channel (UL-SCH), as de…
IEEE 802.15.3c Irregular LDPC(672,336), LDPC(672,504), LDPC(672,588) encoder and decoder
IEEE802.15.3c irregular LDPC(672,336), LDPC(672,504), LDPC(672,588) encoder and decoder.
China Multimedia Mobile Broadcasting (CMMB) LDPC decoder, implemented with Continuous bits’ LDPC-decoder architecture.
Nios II Soft IP Processor for Safety Critical Applications
NIOSII_SC soft IP Processor is the safety critical version of the of the Nios II processor targeting airborne electronic applicat…
Configurable Multi-channel Serial Audio Transmitter
The TDM-Tx-Pro (CWda19) is part of the AudioWorks family of proven audio interface cores featuring a configurable multi-channel a…