Xilinx Interlaken IP core is based on Sarance Technologies Best-In-Class Intellectual Property Interlaken is a scalable chip-to-c…
- Interlaken
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Xilinx Interlaken IP core is based on Sarance Technologies Best-In-Class Intellectual Property Interlaken is a scalable chip-to-c…
The LTE PUCCH Receiver LogiCORE™ IP core provides the receive functionality required for the LTE Physical Uplink Control CHannel …
Xilinx provides a market DPD solution that reduces CapEx and OpEx Digital Pre-Distortion (DPD) is one of the most fundamental bui…
The 3GPP LTE Channel Estimator LogiCORE™ IP provides an optimized channel estimation function for the Physical Uplink Shared Chan…
4 channel SERDES operating at up to 6.25Gbps for XAUI, RXAUI and SGMII (40nm TSMC)
PSI6254XRX is a 4 channel SERDES capable of providing XAUI (10G Attachment Unit Interface), RXAUI (10G Reduced Attachment Unit In…
Multi Protocol SERDES operating at up to 12.5Gbps (40nm TSMC)
PSI1250MP is a multi-protocol SERDES capable of operating at up to 12.5Gbps.
Low noise PLL operating at up to 3.25GHz (90nm UMC)
PSI3GRP_U9 is a low jitter PLL operating from 1GHz to 3.25GHz.
Wide range PLL operating from 135MHz to 945MHz (90nm UMC)
PSIWRP_U9 is a wide range PLL with the VCO operating from 175MHz to 945MHz.
Low spurs PLL operating at 1.296GHz (90nm UMC)
PSI1GLSP_U9 is a low spurs PLL operating at 1.296GHz.
Low noise PLL operating at 1.25GHz and 625MHz (90nm UMC)
PSI1GLP_U9 is a low jitter PLL operating at 1.
Low noise PLL operating at up to 5GHz (40nm TSMC)
PSI5GLP_T4 is a low jitter PLL operating from 3GHz to 5GHz continuously, and with the output divider it can cover 1/2 and 1/4 spe…
Low noise PLL operating at up to 3.25GHz (40nm TSMC)
PSI3GLP_T4 is a low jitter PLL operating from 2GHz to 3.3GHz continuously, and with the output divider it can cover 1/2 and 1/4 s…
IBM 65nm LPe 24M Crystal Oscillator
This is a crystal oscillator specifically designed for low power application.
IBM 65nm LPE Process 10Bit 2-Channel 40MHz ADC
The VeriSilicon I65LPEV25_ADC_06 IP is a 2.5V 10Bit 40MHz pipeline analog to digital converter capable of running at up to 80MHz …
IBM 65nm SF 1.0V Voltage Detector
The present IP is a Voltage Detector (VDT) circuit.
IBM 65nm SF 3.3V/1.0V Power on Reset
The present Power-On-Reset circuit generates system reset pulses (RST) when both the 3.3V and 1.0V power suppliers are turned on.
IBM 65nm SF 3.3V Power on Reset
The present Power-On-Reset circuit generates system reset pulses (RST) when the 3.3V power supplier is turned on.
Designed for audio clock generation, this PLL integrates a phase frequency detector (PFD), a loop filter (LP), a voltage control …
IBM 65nm 12-Bit 8-Input 1M/200k SAR ADC
This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.
SMIC 65nm 1.2v/2.5v Spread Spectrum PLL
This IP is a programmable Analog PLL suitable for high speed clock generation.