UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.
- Ethernet
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.
Core implements the IPsec and SSL/TLS security standard at high data rates that require the cryptographic processing acceleration.
PCIe Testbench from Rambus emulates a Root Complex device enabling simulation of a PCI Express design.
12-bit 50kS/s SAR-AD-Converter
IMST developed a discrete high resolution 14-bit Δ∑-ADC with a high output data IMST’s 12-bit analog-to-digital converter solutio…
DVB-S demodulator / DSNG demodulator
The CMS0048 DVB-S/DSNG Demodulator is a high-performance (A)PSK demodulator core intended for DVB-S and DVB DSNG forward link app…
The CMS0059 Satellite Demodulator is a high-performance (A)PSK demodulator core intended for DVB-S, DVB-DSNG, DVB-S2 and DVB S2X …
32-bit Basic Application Processor
The royalty free BA22-AP is a 32-bit processor for demanding embedded applications that use off-chip instruction and data memorie…
32-bit Deeply Embedded Processor
The royalty free BA22-DE is a compact yet 32-bit processor for deeply embedded applications.
Flash SPI controller master/slave
Veriest's SPI Master Controller IP provides an industry standard data communication channel between the AMBA APB and SPI buses.
The Flexibilis Redundant Switch (FRS) is a triple-speed (10Mbps/100Mbps/1Gbps) Ethernet Layer-2 switch that supports new protocol…
Remote Debug using Vivado Design Suite Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and prov…
The Processor Local Bus (PLB v4.6) to AMBA® ( Microcontroller Bus Architecture) eXtensible Interface (AXI) Bridge translates PLBV…
PicoBlaze 8-bit Microcontroller
PicoBlaze™ is a fully embedded 8-bit RISC microcontroller core optimized for 7-series and older Xilinx FPGA architectures.
Mutex provides a mechanism for mutual exclusion to enable one process to gain exclusive access to a particular resource in a mult…
Mailbox features a bi-directional communication channel between two processors.
The ChipScope™ AXI Monitor core is designed to monitor and debug AXI interfaces.
The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP core that provides high-bandwidth direct memory access bet…
The LogiCORE™ IP AXI Universal Asynchronous Receiver Transmitter (UART) Lite interface connects to the Microcontroller Bus Archit…
The AXI Universal Asynchronous Receiver Transmitter (UART) 16550 connects to the AMBA® (Advance Microcontroller Bus Architecture)…
This document describes the specifications for a Microcontroller Bus Architecture (AMBA®) specification’s eXtensible Interface (A…