IP
- USB 2.0
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
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IP
USB1.1 PHY - HHGrace 110nm ULL
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IP
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Cost Efficient and Low-Power Design for MCUs, Wearables, and AIoT Devices
Single Port SRAM compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 64…
Single Port SRAM compiler - TSMC 55 nm LP - Memory optimized for high density and low power - Deep N Well supported - compiler ra…
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for ultra high density and low power - 3ML- comp…
Dual Port SRAM compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler range …
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Du…
Single Port Register File compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range…
Foundry sponsored - Single Port Register File compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual …
This MIPI DPHY Tx PHY IP is designed to the MIPI D-PHY 1.2 specifications.
SMIC 0.15um Low Voltage 9 track Standard Cell Library,1.2v operating voltage
SMIC 0.15um LV 9T High-Density Standard Cell Library
SMIC 0.15um 9 track Standard Cell Library,1.5v operating voltage
SMIC 0.15um 9T High-Density Standard Cell Library
SMIC 0.13um Low Leakage 9 track Standard Cell Library,1.5v operating voltage
SMIC 0.13um Low Leakage 9 track Standard Cell Library
SMIC 0.13um 1.2V<->3.3V level shifter,1.2v/3.3v operating voltage
SMIC 0.13um 1.2V3.3V Level Shfiter Library
SMIC 0.13um Power Management Kit,1.2v operating voltage
SMIC 0.13um Power Management Kit Library
SMIC 0.13um 6 track High Density Standard Cell Library - LVT,1.2v operating voltage
SMIC 0.13um 7T LVT High-Density Standard Cell Library