Vendor: Dolphin Semiconductor Category: ROM

Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k

Metal programmable ROM compiler - TSMC 65 nm LP - Non volatile memory optimized for low power - compiler range up to 256 k

Overview

Metal programmable ROM compiler - TSMC 65 nm LP - Non volatile memory optimized for low power - compiler range up to 256 k

Key features

  • Power reduction features
  • Decrease of packaging cost
  • Smaller SoC area
  • Decrease of fabrication costs
  • Programmable through via layer between metal layers 1 and 2
  • SoC routing allowed upwards from Metal 3
  • Patented High Density bit cell
  • 5% to 10% denser than contenders
  • Part of the High Density - Low Power Panoply
  • Dual port memory array and memory register Eris
  • Single port memory register Aura
  • Single Port memory array Haumea
  • Density and Speed optimized standard cell libraries
  • Optimal Design for Yield
  • Read margin optimized instance by instance
  • Design methodology ensuring High-Yield circuits despite Mismatch
  • Association with LDO for regulated power supply voltages
  • Optional BIST for industrial fabrication test of instances

Specifications

Identity

Part Number
sROMet-HAUMEA-BCD_TSMC_65nm_LP_Generator
Vendor
Dolphin Semiconductor
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Frequently asked questions about ROM IP cores

What is Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k?

Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k is a ROM IP core from Dolphin Semiconductor listed on Semi IP Hub.

How should engineers evaluate this ROM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ROM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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