CXL is high bandwidth, low latency interconnect lies between host processor and memory devices/accelerators or other network inte…
- CXL
- Immediate
- CXL V3.0/V2.0
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
CXL is high bandwidth, low latency interconnect lies between host processor and memory devices/accelerators or other network inte…
PCIE Gen6 digital controller (End Point)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links.
IP
NVMe over TCP IP core - End-to-End NVMe-oF TCP connectivity with no CPU!
NVMeTCP IP is the standalone host side NVMe Over Fabric (NVMe/TCP) controller with no CPU and external memory required.
ES256-XTS IP Core (AES256XTSIP) implement the encryption standard (AES) with XEX Tweakable Block Cipher with Ciphertext Stealing …
SMPTE 2110-22 Sub-system (TX/RX) IP-cores for JPEG XS video over RTP encapsulation
The intoPIX SMPTE 2110-22 Sub-system IP-cores (TX & RX) are combining the IPX-RTP-XS cores for JPEG XS RTP packetization / depack…
Video Design Framework for Multi-camera Vision Applications
The logiREF-ACAP-VDF "ACAP IP Framework for Multi-Camera Vision Applications" enables Xylon logiVID-ACAP-6CAM ACAP Vision Develop…
The DisplayPort Multi Stream Transport (MST) Topology Management Software implements MST topology management for multiple monitor…
The PWM IP core implements a compact and flexible Pulse Width Modulator.
CCSDS AR4JA LDPC
NetTimeLogic’s NTP Server is a full hardware (FPGA) only implementation of a SNTPv4 Server according to RFC 4330/5905.
NetTimeLogic’s NTP Clientis a full hardware (FPGA) only implementation of a SNTPv4 Client according to RFC 4330/5905.
20b-linear 100MS/s DAC on X-FAB 180nm SOI
20b-linear 100MS/s DAC on X-FAB 180nm SOI
Highly efficient out-of-order RISC-V vector application processor series
The SiFive Performance™ P400-Series application processors are SiFive’s first efficiency-focused Out-of-Order processors.
Ultra-low power image signal processing for AIoT and wearable markets
Inline Memory Encryption (IME) Security Module - for DDR/LPDDR
As our connected world expands, the technological advances in high-performance computing (HPC) are reshaping system-on-chip (SoC)…
OPEN Alliance TC14 10BASE-T1S PMD Controller
The CT25207, in combination with the CT25203, implements a OPEN Alliance TC14 10BASE-T1S PMD Interface.
Analog to Digital Converter 8 Bit
The WEA8ADB45 is an 8-bit successive approximation Analog to Digital Converter.
The OT4001_cjtag is an adapter which permits legacy IEEE 1149.1 ports to communicate as an IEEE 1149.7 2-wire OScan1 cJTAG port.
Dual 12-bit 80Msps Low power silicon proven in 28nm ADC IP
It is a Dual 12-bit analog-to-digital converter (ADC I &Q) that operates up to 80MS/s.