Overview
The logiREF-ACAP-VDF "ACAP IP Framework for Multi-Camera Vision Applications" enables Xylon logiVID-ACAP-6CAM ACAP Vision Development Kit users to quickly utilize the provided hardware platform for the development of AMD-Xilinx Versal Adaptive Compute Acceleration Platform (ACAP) based embedded multi-camera vision systems. The framework includes pre-verified logicBRICKS reference design for video capture from six Xylon video cameras and the display output under Linux OS. The framework showcases the advantages of the Versal ACAP platform by visualizing 6 camera streams in parallel, with or without running advanced image filters, and with real-time LIDAR data that is visualized instantly on the screen in the form of a 3D point cloud.
Instead of starting from scratch and having to spend months designing and building a new design framework, users of the logiREF-ACAP-VDF design framework can immediately focus on specific vision-based parts of their next ACAP design. This design implements six parallel video inputs from Xylon video cameras and the display output with RGB overlay. All video inputs are stored in the video memory, and by mean of on-board push buttons, the user can select each of them for the single camera or all cameras full screen display output.
All logicBRICKS IP cores are supplied with bare-metal and appropriate Linux software drivers. The provided video capture and display demo applications run in Linux OS.
Learn more about Vision Subsystem IP core
Xylon has introduced its latest FMC expansion board designed to bring high-speed automotive connectivity to advanced video and vision AI systems. The new logiFMC-GMSL3/2-96726A 12-channel FMC+ mezzanine card enables seamless interfacing of up to twelve video cameras with FPGA and adaptive SoC platforms.
Over three decades, Xylon has consistently driven innovation in embedded systems, developing advanced solutions for automotive, defense, industrial automation, medical and other key sectors.
Xylon ISP Studio is a powerful PC-based tool designed to simplify and accelerate HDR Image Signal Processing (ISP) pipeline development and tuning on AMD FPGA and adaptive SoC platforms.
Xylon has introduced the logicBRICKS Vision AI Framework, designed to simplify AI development on AMD Versal™ and Zynq™ UltraScale+™ SoCs.
The updated logiHSSL IP Core introduces a "reduced IP configuration," supporting one HSSL target device and one streaming data channel. Based on Xylon's experience, this configuration meets the needs of the vast majority of logiHSSL IP users.
Xylon just upgraded company’s logicBRICKS High Dynamic Range (HDR) Image Signal Processing (ISP) IP Suite with the new RGB-IR image processing module.