eUSB2 v1.2 Dual-Role, repeater/native mode PHY, SamSung SF3P, 1.0V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
- Single-Protocol PHY
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
eUSB2 v1.2 Dual-Role, repeater/native mode PHY, SamSung SF3P, 1.0V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
eUSB2 v1.1 Dual-Role, repeater/native mode PHY, TSMC N5, 1.2V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
USB1.1 FS/LS PHY, TSMC 55ULP_EF
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
USB1.1 FS/LS PHY, TSMC 40ULP_EF
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
USB2.0 Dual-Role PHY, SMIC 55LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, SMIC 40LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, UMC 28HPC+, N/S orientation
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, TSMC 55EF
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, TSMC 12E, N/S orientation, type-C
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
BCH Encoder and Decoder IP Core
The IP Core implements BCH Code encoding and decoding.
The PCIe Gen4.0 PHY IP offers a low-power, compact solution with proven performance and robust signal and power integrity, making…
The PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations.
Logic Fruit Technologies has developed an ARINC 818-3 Transmitter & Receiver IP Core, supporting line rates up to 28 Gbps.
Highest performance Six-wide, RVA23, CHI bridge, RAS Functionality, Scalable to 256 cores
The highest performance P870-D is targeted for datacenter applications which benefit from parallelism, including storage, web ser…
3.3V to 1.8V and 0.9V step-down DC-DC converter
3.3V to 1.8V and 0.9V step-down DC-DC converter
8-bit, 1MSPS low-noise high accuracy analog-to-digital converter
The 8-bit, 1Msps ADC is a single-ended cyclic ADC based on 1.5-bit/conversion architecture with error correction.
AES encryption transforms plaintext into ciphertext through multiple transformation rounds.