Vendor: Sifive, Inc. Category: Coherency

Highest performance Six-wide, RVA23, CHI bridge, RAS Functionality, Scalable to 256 cores

The highest performance P870-D is targeted for datacenter applications which benefit from parallelism, including storage, web ser…

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Overview

The highest performance P870-D is targeted for datacenter applications which benefit from parallelism, including storage, web servers and video streaming. The P870-D can be used standalone or in conjunction with a member of the SiFive Intelligence Processor Family.

P870-D is fully compliant with the RVA23 RISC-V Instruction Profile. It incorporates a shared cluster cache enabling up to -32 cores to be connected coherently. Use of a CHI bridge expands this to 256 CPU coherent cores, connected either in an SoC or as a set of discrete chiplets.

  • RAS architecture to configure and reports errors in a manner compatible with RISC-V defined standard.
  • Power management with cluster-level DVFS and idle power modes
  • Supporting System IP, IOMMU, WorldGuard, Virtualization, Trace and Debug

Key features

  • Highest performance
  • 64-bit, Six-wide, out-of-order core
  • >2 SpecINT2k7 / GHz *
  • Up to 64 clusters, max 256-cores, either on-chip or via chiplet connectivity

Specifications

Identity

Part Number
Performance P870-D
Vendor
Sifive, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Sifive, Inc.
HQ: USA
Contact Sifive, Inc.

Learn more about Coherency IP core

SoC design: When a network-on-chip meets cache coherency

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To understand the issues at hand, it’s first necessary to understand the role of cache in the memory hierarchy.

Co-Designed Cache Coherency Architecture for Embedded Multicore Systems

In this paper, we present the round-robin method applied to baseline coherency protocol and initial analysis of one hybrid protocol that performs speculative requests when access patterns are detected. We also propose to manage patterns through a dedicated hardware component attached to each core of the processor.

Frequently asked questions about Coherency Interconnect IP cores

What is Highest performance Six-wide, RVA23, CHI bridge, RAS Functionality, Scalable to 256 cores?

Highest performance Six-wide, RVA23, CHI bridge, RAS Functionality, Scalable to 256 cores is a Coherency IP core from Sifive, Inc. listed on Semi IP Hub.

How should engineers evaluate this Coherency?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Coherency IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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