Configurable AMBA bus SoC platform
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development.
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Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Configurable AMBA bus SoC platform
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development.
Power on reset for 1.8V - SMIC 0.18um
Power-on reset monitoring 1.8V supply.
VGA with gain 0.5 to 128 - TowerJazz 0.18um
Variable gain amplifier with gain programmable from 0.5 to 128 by step of 6dB with switched-capacitors operation.
Line driver 0.5A - TowerJazz 0.18um
Fully integrated line driver amplifier of class AB with output current load up to 0.5A.
Temperature detector - SMIC 0.18um LL
The cell indicates if the junction temperature is in the range from -40 to 125 degrees.
10-Bit 64MHz 1.2V 1.9mW delta-sigma ADC, CMOS 130nm
The nSAD_ST130M_1V2_AD10b64M is a 64MS/s, 9.9 ENOB, power efficient Sigma Delta ADC designed on the ST 130 M technology.
AHB Compliant Nand Flash Controller
NAND Flash Controller has a built-in AHB Slave Interface, handles all sorts of Nand Flash commands, address & data sequences.
14-Bit 150MS/s 1.2V/3.3V 250mW ADC, CMOS 130nm
The nSAD_TS130M_3V3_1V2_AD14b150M is a 150MS/s, 13 ENOB, high-precision pipeline AD converter designed on the TSMC 130 M technolo…
Dual 12-Bit 20 to 200MS/s 1.2V ADC, CMOS 90nm
The nSAD_TS90GP_1V2_AD2x12b200M is a dual 200MS/s, 11 ENOB, dual pipeline AD converter designed on the TSMC 90 GP technology.
10-Bit 100MS/s 1.8V 66mW ADC, CMOS 0.18µm
The nSAD_UM180M_1V8_AD10b100M is a 100MS/s, 9.5 ENOB, highspeed and low-power AD converter designed on the UMC 180 MM technology.
The MW_AES core performs the digital baseband function that can be used to protect electronic data.
SMIC 0.25um 2.5V/3.3V SSTL3 I/O Cell Library
VeriSilicon SMIC 0.25um 2.5V/3.3V SSTL3 I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing In…
SMIC 0.25um 2.5V/3.3V SSTL2 I/O Cell Library
VeriSilicon SMIC 0.25um 2.5V/3.3V SSTL2 I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing In…
SMIC 0.18um 1.8V/3.3V DUP I/O Library
VeriSilicon SMIC 0.18um 1.8V/3.3V DUP I/O Library developed by VeriSilicon is optimized for Semiconductor Manufacturing Internati…
"DCI" 4K JPEG 2000 Encoder/JPEG 2000 Decoder
D-Cinema and the Beyond Cinema JPEG 2000 families have been especially designed to meet today’s requirement of the Digital Cinema…
I2C Controller (AMBA APB <-> I2C)
The I2C Controller provides access to devices with I2C interface.
HCLSATAHC26113G core handles data movement between system memory and a SATA device.
The AXI DDR3 Controller provides access to DDR3 memory.
GCM-AES IP Core − Authenticated Encryption & Decryption
The AES-GCM128 IP core implements the GCM-AES authenticated encryption and decryption, as specified in the NIST SP800-38D recomme…
AES Encryption & Decryption IP Core − Single Configurable Block Cipher Mode
The AES-C IP core implements the FIPS-197 Encryption Standard.