Bayer Color Filter Array Interpolation Core
ASICFPGA Bayer CFA Interpolation Core: Digital cameras capture images by using a single sensor with a color filter array.
- ISP Image Signal Processor
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Bayer Color Filter Array Interpolation Core
ASICFPGA Bayer CFA Interpolation Core: Digital cameras capture images by using a single sensor with a color filter array.
ASICFPGA HDR core: Real-world scenes often have a very high dynamic range (HDR) that exceeds the dynamic range of the image senso…
The MIPI D-PHY IP (MXL-DPHY) is a high-frequency low-power, low cost, source-synchronous, physical layer compliant with the MIPI®…
Lightweight Configurable Display Controller
The IQ-DispLite is a lightweight, fully software configurable display controller IP core.
The LVDS_RX is CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and h…
The LVDS_TX is CMOS differential line transmitter designed for applications requiring ultra low power dissipation, low noise, and…
The Regulator is designed to power the devices that require currents upto 60mA.
The Regulator is designed to power the devices that require currents upto 1mA.
The designated IP is a power on reset circuit intended for integration into 130nm CMOS technology System on Chips.
The designated IP is a very low power, high precision band gap reference circuit intended for integration into 130nm CMOS technol…
Quad SPI Flash Memory Controller
The SPI-MEM-CTRL core is an SPI serial NOR and serial NAND flash memory controller, supporting Single, Dual and Quad I/O SPI acce…
Low power 8-bit ADC, 2Mhz , 600uA - 3.3V
8-bit ADC in 0.35um HHNEC CZ6H process 600uA @ 2Mhz
Fully Configurable Radix 2 FFT/IFFT Processor
ntFFT core is a fully configurable solution that performs the FFT and IFFT transform.
Serializer 32:1 for 8.5-11.3Gb/s for SONET/SDH, 10Ge, XFI, Back Plain
PMCC_SER12G is a macro-block designed for robust 8.5-11.3Gb/s data 32:1 serialization independent on data coding.
Deserializer 1:32 for 8.5-11.3Gb/s for SONET/SDH, 10Ge, XFI, Back Plain
PMCC_DSER12G is a macro-block designed for robust data/clock recovery and demultiplexing 1:32.
8/10/12-bit Extended JPEG Encoder with Optional Video Rate Control
The JPEG-E-X core is a standalone and high-performance 8-bit Baseline and 10/12-bit Extended JPEG encoder for still image and vid…
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing Inte…
ITU-Ghn LDPC Encoder / Decoder
TC4400 is a LDPC decoder core that is fully compliant with ITU G.hn (wireline home networking) specifications.
512B/ECC16 Nand Flash BCH Encoder/Decoder
The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission.
Standard Definition Video (PAL/NTSC) De-Interlacer, Basic Algorithm
The xc-SDDIB is a low-cost deinterlacing IP core that converts a standard 4:2:2 formatted interlaced video stream into a 4:2:0 pr…