Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
- SMIC
- 40nm
- LL
- Available on request
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
Duet Package of Embedded Memories and Logic Libraries for Huali (55nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
The SONY_CAM_IF IP Core provides a simple way to connect the Sony® FCB-EV range of cameras to your FPGA.
TSMC CLN16FFC Ternary Content Addressable Memory
IGMTLSLV02A is a synchronous LVT periphery high-density ternary content addressable memory (TCAM).
This datasheet describes GUC’s HBM (High Bandwidth Memory) PHY IP, which can be integrated with HBM memory controller to provide …
TSMC CLN28HPC 12-bit 250MHz Current Steering DAC [2ch]
The IGADACT10A is a general-purpose 2-channel digital to analog converter with 12-bits resolution.
TSMC CLN28HPC+ 2.4GSps Analog Front-End
The IGAAFET05A which contains ADCs, DACs and PLLs is an analog front-end (AFE) IP for RF applications.
The 18-bit Pipeline DSP slice IP Core provides the best utilization of device resources like memory, I/O, processor and clock.
The SMBus library provides open-drain bi-directional I/O cells designed for the High-Power SMBus two-line interface.
The ESD Protection library provides ESD protection components.
Silicon agnostic Ethernet MAC IP for 10G, 25G speeds Ethernet MAC 10G/25 IP is a solution that enables the host to communicate da…
Ethernet 1G/2.5G/5G/10G/25G and CPRI 7.0 PCS
The vendor offers a PCS IP core that can be used for both Ethernet and CPRI.
Low Power PLL for TSMC 40nm ULP
The OT3135 is a flexible low power clock multiplier PLL function with a wide range of input and output frequencies, and is design…
The SPI to AXI Bridge IP core is commonly used as a monitor interface to allow external devices to access the internal AXI bus.
Ultra Compact 32-bit RISC-V CPU Core
AndesCore™ N22 is a 32-bit 2-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications that require…
Ethernet TSN MAC 10M/100M/1G/2.5G
Silicon agnostic Ethernet TSN MAC IP, IEEE 802.3 Ethernet Layer 2 solution with support for key TSN features The TSN MAC 10M/100M…
The DB-SPI-XIP-FLASH-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting access to Single/Dual/Quad…
Dual WideBand Frequency Synthesizer with Integrated VCO and Loop Filter - GlobalFoundries 55nm
CorePLL is a wideband phase-locked loop (PLL) system for 2G (GSM) 3G and 4G (LTE), including Carrier Aggregation (CA) for 3GPP Re…
The logiHSSL IP core enables high-speed communication between microcontrollers of Infineon's AURIX family (TC2xx and TC3xx) and X…