4-bit, 10 GSPS Flash ADC - STMicroelectronics 28nm
The A4B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
- 4 Bit
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
4-bit, 10 GSPS Flash ADC - STMicroelectronics 28nm
The A4B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
Combined Power-On-Reset and Brown-Out-Reset in TSMC 22ULL
Combined Power-On-Reset and Brown-Out-Reset in TSMC 22ULL
Multi-PHY Receiver Link Controller
CD12842M8LRM3BM4AIP312P5 is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system.
MIPI D-PHY TX/CSI2 Link Controller
CD12631S4TIP is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system.
SLVS-MI/MIPI-DPHY Transmitter - 4-Lane 2500Mbps
The CL12821I4T2JM2NIP2500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.
SLVS-MI Transmitter - 4-Lane 2500Mbsps
The CL12811I4T1ES1HIP2500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.
MIPI D-PHY Transmitter 4-Lane (4-Data/1-Clock) 250Mbps
The CL12631I4T1AS1BIP2500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.
HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 12FFC
This HDMI 2.O Rx IP provides a HDMI receiver function and complies with HDMI specification version 2.0b.
The Fast sort IP core is a AXI-compatible digital hardware block with internal data sorting algorithm.
2K TicoRAW Encoder / Decoder for RAW CFA sensor data compression
Engineered at intoPIX, TicoRAW is an , lossless quality, low-power, low-memory and line-based image processing and compression te…
8K TicoRAW Encoder / Decoder for RAW CFA sensor data compression
Engineered at intoPIX, TicoRAW is an , lossless quality, low-power, low-memory and line-based image processing and compression te…
4K TicoRAW Encoder / Decoder for RAW CFA sensor data compression
Engineered at intoPIX, TicoRAW is an , lossless quality, low-power, low-memory and line-based image processing and compression te…
TicoXS | JPEG XS HD Encoder / Decoder IP-cores
JPEG XS has been co-created by intoPIX.
14b, 4Gsps, Self-Calibrating Current Steering IQ DAC for 5G & WIFI6 in samsung 8nm
DAIQ14CS4G08NLL is high performance 14b current steering IQDAC that supports data rate up-to 4Gsps.
Dual channel 12-bit, 4GS/s ADC IP for 5G in 8nm process
ADIQ12B4G08NLL is a Dual channel 12-bit analog-to-digital converter (ADC) that operates up to 4.0 GS/s.
14-bit, 1200 MSPS Ultra Low Power AFE in 28nm CMOS
The ODT-AFE-14B1P2G-28 is a low power high speed pipelined AFE designed in a 28nm standard CMOS process.
Network Redundancy (HSR & PRP) core
The HSR&PRP Core from NetTimeLogic is a standalone Network Redundancy Core according to IEC62439-3 rev3.
Time Sensitive Networking (TSN) Switched End Node core
The TSN Network Core (Switched End Node) from NetTimeLogic is a standalone Time Sensitive Networking (TSN) core according to IEEE…
Our analog-to-digital converter is a configurationally general-purpose ADC that uses a traditional Charge-Redistribution SAR arch…
The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass …