CAN Controller Core with 32/32 Message Objects
CANmodule-IIIx is a full functional CAN controller module that supports the concept of mailboxes.
- CAN / CAN-FD / CAN-XL
- Silicon proven in ASIC and FPGA Technologies
- now
- Tested according to ISO 168…
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
CAN Controller Core with 32/32 Message Objects
CANmodule-IIIx is a full functional CAN controller module that supports the concept of mailboxes.
BitBLT Graphics Hardware Accelerator (AXI4 Bus)
The DB9100AXI4 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comma…
BitBLT Graphics Hardware Accelerator (AHB Bus)
The DB9100AHB BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comman…
BitBLT Graphics Hardware Accelerator (AXI Bus)
The DB9100AXI BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comman…
The DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder interfaces RGB data along with synchronization signals from a LCD Controller (or…
AMBA AXI from ARM Holdings is an high performance on-chip bus architecture.
The MVD ASI Transmitter core is a drop-in module that includes the following functions : • 188 or 204 bytes MPEG-TS input • 8B/10…
The UDP/IP core is a drop-in module which includes its own MAC to send and receive UDP packets on an Ethernet Network.
The MVD ATSC core is a drop-in module for FPGA that includes the following functions: - Input data framer from DVB-SPI source (MP…
10G TCP Offload Engine+MAC+PCIe+Host_IF Very-Low Latency (XTOE+PCIe)
INT 10012 is the only SOC IP Core that implements a full 10G bit TCP Stack in Handcrafted, Ultra-Low Latency and Very High Perfor…
10G TCP Offload Engine+MAC+Host_IF Very Low Latency (XTOE)
INT 10011 is the only SOC that integrates 10G TOE + 10 GEMAC + CPU interfaces in the smallest logic footprint.
Reference frequency oscillator
Reference oscillator is used to generate reference frequency and can work at the 1st or the 3rd harmonic of quartz resonator.
Tunable oscillator of reference frequency
Reference oscillator is used to generate reference frequency and can work at the 1st or the 3rd harmonic of quartz resonator.
1220 to 1610 MHz Low noise amplifier
Low noise amplifier (LNA) is usually used as the first stage of receivers and is characterized by low noise figure and high linea…
120..950 MHz Frequency multiplier
A frequency multiplier is a circuit that generates an output signal whose output frequency is a harmonic of its input frequency.
Intermediate-frequency amplifier
Intermediate-frequency amplifier consists of 1 stage amplifier with dual (I/Q) differential inputs/outputs, automatic gain contro…
130 to 935 MHz Quadrature down mixer
Quadrature mixer is based on Gilbert cells and consists of two double-balanced mixers converting RF frequency to a low intermedia…
Programmable CMOS frequency divider (56..16383 dividing ratio)
The cell is 14-bit programmable frequency divider.
Programmable frequency divider (56 to 16383 dividing ratio)
The cell is 14-bit programmable frequency divider.
The block consists of 4 low pass filters connected in serially.