USB OTG IP Listing

This is a 3V to 5V regulated charge pump that will provide up to 100mA output current.

• SMIC
• 180nm
• G

The USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specific…

• Single-Protocol PHY

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• GlobalFoundries
• 55nm
• LPe
• Available on request

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• UMC
• 65nm
• Available on request

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• TSMC
• 40nm
• LP eFlash
• Available on request

The Synopsys USB 2.0 nanoPHY provides designers with a Physical Layer (PHY) IP solution, designed for low-power mobile and consum…

• SMIC
• 65nm
• LL
• Available on request

LTTS USB 2.0 OTG controller are designed for compliance with USB2.0 specification Revision 2.0 and all associated ECN’s and USB O…

• USB
• FPGA validated
• Now
• USB2.0 Revision 2.0

The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers …

• USB

The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers …

• USB

The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers …

• USB

Our company offers a configurable and adaptable USB 2.0 OTG controller IP core, suitable for a wide range of applications.

• USB
• In Production
• Immediate
• USB2.0 specifications Revis…

The USB 3.0 PHY is a , mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip integration into …

• Single-Protocol PHY
• Silicon Proven; Design Ready(SMIC,28)
• Immediate

The Synopsys USB 2.0 Controllers support Hi-Speed (480 Mbps), Full Speed (12 Mbps), and Low Speed (1.5 Mbps) operation based on U…

• USB
• Available on request
• Available

A ‘Dual-Role’ USB 2.0 On-The-Go IP Core that operates as both an USB 2.0 peripheral or as an USB 2.0 OTG host in a point-to-point…

• USB
• production
• now
• USB 2.0, OTG 1.0, UTMI+ L2,…

OTG USB 2.0 PHY (VDT and ID are included in PHY), UMC 55nm SP Low-K Logic process.

• UMC
• 55nm
• SP

USB OTG 2.0 PHY, UMC 0.153um Logic process.

• Single-Protocol PHY

ID Detector for USB OTG Function, UMC 65nm SP/HVT Low-K Logic process.

• UMC
• 65nm

The USB 2.0 OTG IP Core is compliant with the OTG Supplement Rev.

• USB

USB3.x OTG interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specifica…

• USB

USB2.x OTG interface provides full support for the USB2.x synchronous serial interface, compatible with USB 2.0 specification.

• USB