Compliant with PCI Express Specifications 6.1 (64GT/s), 5.0 (32GT/s), 4.0 (16GT/s), 3.1 (8GT/s), 2.0 (5GT/s) and 1.1 (2.5GT/s).
- Verification IP
- PCIe 6.0
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Compliant with PCI Express Specifications 6.1 (64GT/s), 5.0 (32GT/s), 4.0 (16GT/s), 3.1 (8GT/s), 2.0 (5GT/s) and 1.1 (2.5GT/s).
Support for 32.0 GT/s Data Rate per lane with backwards compatible.
The PCIe Gen2 Verification IP provides an effective & efficient way to verify the components interfacing with PCIe Gen2 interface…
MIPI Unipro v3.0 Verification IP
The MIPI UniPro Verification IP provides an effective & efficient way to verify the components interfacing with MIPI UniPro inter…
MIPI M-PHY v6.0 Verification IP
Compliant to MIPI M-PHY version 6.0
The MIPI DSI with C-PHY Verification IP provides an effective and efficient way to verify the components interfacing with MIPI DS…
MIPI DSI With D-PHY Verification IP
Compliant to MIPI DSI v1.3.1 and MIPI D-PHY v2.1 with PPI Interface.
The MIPI D-PHY Verification IP provides an effective & efficient way to verify the components interfacing with MIPI D-PHY interfa…
MIPI CSI-2 with C-PHY Verification IP
The MIPI CSI-2 with C-PHY Verification IP provides an effective & efficient way to verify the components interfacing with MIPI CS…
AXI5 VIP is Compliant with the latest ARM™ AMBA AXI5 & AXI5 lite.
The AMBA AXI4 Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® AXI4 bus of a…
AMBA AXI STREAM Verification IP
Compliant with AMBA® AXI5- Stream and AXI4-Stream.
Compliant to AMBA 3 ATB (aka ATB v1.0) and AMBA 4 ATB (aka ATB v1.1) Protocol.
AMBA APB 5,4,3,2 Verification IP
The AMBA APB Verification IP provides an effective & efficient way to verify the components interfacing with the AMBA® APB bus of…
Compliant to AMBA®5 AHB Protocol specifications and AMBA 3 AHB-Lite Verification IP from ARM
The AMBA5 CHI Verification IP provides an effective & efficient way to verify the components interfacing with AMBA 5 CHI bus of a…
Fully compliant to the AMBA® 4 ACE™ Specification.
AMBA ACE4 Assertion IP provides an smart way to verify the ARM AMBA ACE4 component of a SOC or a ASIC.
UHF Passive RFID Front-End - EPCGlobal Class 1 Gen 2/ISO18000-6C Compliant
This macro-cell is an ultra low power analog/RF front-end core designed for SilTerra 0.18μm CMOS technology.
Power-On Reset - Flexible Threshold (1-1.3V), Ultra Low Current (100nA) - SilTerra 0.16µm CL160G
This macro-cell is an ultra low consumption Power-On Reset (POR) core designed for SilTerra 0.16μm CL160G CMOS technology.