Vendor: Truechip Solutions Category: Protocol Bridge

AMBA AXI4 Verification IP

The AMBA AXI4 Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® AXI4 bus of a…

Verification IP View all specifications

Overview

The AMBA AXI4 Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® AXI4 bus of an IP or SoC. The AMBA AXI4 VIP is fully compliant with standard AMBA® AXI4 specification from ARM. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design cycle time.

Key features

  • Compliant to AMBA® AXI4 specifications from ARM and
  • supports for all variants of AXI4, AXI4-Lite and AXI4 Stream.
  • Support for all type of AMBA AXI4 devices.
  • Strong protocol checking Bus Monitor which also provides statistics of the transactions.
  • Parameterized data and address bus.
  • Supports for all protocol Burst Types, Burst Lengths and Response Types.
  • Configurable modes for Valid and Ready on different channels.
  • Rich set of configuration parameters to control AXI4 functionality.
  • Supports FIFO, memory and Cache Model integrated.
  • Supports Privilege and Secure accesses.
  • Supports out of order transactions with parametrized out of order width.
  • Supports data interleaving on read data channel.
  • Supports Endianess check and conversion.
  • Supports exclusive transfers and configurable Memory.
  • Supports UVM_RAL Model.
  • Provides detailed performance monitoring for all the transfers.
  • Supports advanced SystemVerilog features like constrained random testing.
  • Supports dynamically configurable modes.
  • Strong Protocol Monitor with real time exhaustive programmable checks.
  • Supports Dynamic as well as Static Error Injection scenarios.
  • On the fly protocol checking using protocol check functions, static and dynamic assertion.
  • Built in Extensive Coverage Across the Channels.
  • Provides a comprehensive user API (callbacks) in all BFMs.
  • Graphical analyser to show transactions for easy debugging.

Block Diagram

Benefits

  • Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
  • Unique development methodology to ensure highest levels of quality
  • Availability of various Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and cover points with connectivity example for all the components
  • Consistency of interface, installation, operation and documentation across all our VIPs
  • Provide complete solution and easy integration in IP and SoC environment

What’s Included?

  • AMBA AXI4 Master/Slave Agent
  • AMBA AXI4 Bus Monitor and Scoreboarding
  • AMBA AXI4 Interconnect Model (Optional)
  • Test Environment & Test Suite :
    • Basic and Directed Protocol Tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
  • Integration Guide, User Manual and Release Notes

Specifications

Identity

Part Number
AMBA AXI4 Verification IP
Vendor
Truechip Solutions
Type
Verification IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Protocol Bridge IP core

A comparison of Network-on-Chip and Busses

This whitepaper summarizes the limitations of traditional bus-based approaches, introduces the advantages of the generic concept of NoC, and provides specific data about Arteris’ NoC, the first commercial implementation of such architectures

Frequently asked questions about Protocol Bridge IP cores

What is AMBA AXI4 Verification IP?

AMBA AXI4 Verification IP is a Protocol Bridge IP core from Truechip Solutions listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP