Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: High-Speed

VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library

VeriSilicon SMIC 0.13μm SSTL2/SSTL3 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing …

SMIC 130nm G View all specifications

Overview

VeriSilicon SMIC 0.13μm SSTL2/SSTL3 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13μm Logic 1P6M Salicide 1.3V/3.3V process. This library is fully compliant with JESD8-8 Stub Series Terminated Logic for 3.3V (SSTL3), JESD8-9B Stub Series Terminated Logic for 2.5V (SSTL2) and JESD79E DDR SDRAM specification.

Key features

  • SMIC 0.13μm Logic 1P6M Salicide 1.2V/3.3V process
  • Support SSTL3 class1&class2 and SSTL2 class1
  • Receiver and driver operation frequency: up to 200MHz
  • Power down mode in input buffer
  • Power on sequence control mode
  • Programmable driver strength: SSTL3 class1&2 or SSTL2 class1
  • 2kv/200v typical HBM/MM ESD immunity

Silicon Options

Foundry Node Process Maturity
SMIC 130nm G —

Specifications

Identity

Part Number
S13V33_SSTLCOMBO_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Learn more about High-Speed IP core

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Frequently asked questions about High-Speed I/O Pad IP

What is VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library?

VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library is a High-Speed IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this High-Speed?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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