T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets.
T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules.
With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
Low Power 30mA 10Ghz BW capless IP Core
A 30mA 10GHz BW capless LDO (Low Drop-Out) is a type of voltage regulator that is designed to provide a stable output voltage wit…
20mA 10GHz BW capless IP core is a digital circuit block that provides a capless Low Drop-Out (LDO) voltage regulator function.
A 10mA 10GHz BW capless LDO (Low Drop-Out) is a type of voltage regulator that is designed to provide a stable output voltage wit…
Ultra low Power High Speed 150MHz integer-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 150 MHz is required to lock to an incoming clock source and produce an output clock…
Ultra low Power High Speed 400MHz lnteger-N PLL IP Core
An ultra-low-power programmable fractional-N at 400MHz, phase-locked loop (PLL) for frequency synthesis available at 110nm.
Ultra low Power High Speed 500MHz integer-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 500MHz is required to lock to an incoming clock source and produce an output clock …
Ultra low Power High Speed 600MHz lnteger-N PLL IP Core
An ultra-low-power programmable fractional-N at 600MHz, phase-locked loop (PLL) for frequency synthesis available at 22nm.
Ultra low Power High Speed 800MHz Frac-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 800MHz is required to lock to an incoming clock source and produce an output clock …
Low Power High Speed 1GHz Frac-N PLL IP Core
An ultra-low-power programmable fractional-N at 1GHz phase-locked loop (PLL) for frequency synthesis available at 28nm.
Low Power High Speed 1.2GHz Frac-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 1.2GHz is required to lock to an incoming clock source and produce an output clock …
Ultra low Power 1.4GHz Frac-N PLL IP Core
An ultra-low-power programmable fractional-N (ULF), phase-locked loop (PLL) at 1.4GHz for frequency synthesis available at 40nm.
Low PowerHigh Speed 1.6GHz Frac-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 1.6GHz is required to lock to an incoming clock source and produce an output clock …
High Speed 1.5GHz Frac-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 1.5GHz is required to lock to an incoming clock source and produce an output clock …
V-by-One Rx IP, Silicon Proven in 40G
Using internal equipment connections, the V-by-One HS technology seeks to send video signals at a high data rate.
V-by-One Tx IP, Silicon Proven in 40G
The V-by-One HS technology aims to transmit video signals at a high data rate using an internal connection between devices.
24-bit Sigma Delta Stereo Audio Ulter low area silicon provenin 28nm DAC
low-cost stereo digital to analog converter for audio applications.
18-bit Sigma Delta Stereo Audio 28nm silicon proven in TSMC 28HPC ADC
This is a low-cost stereo analog to digital converter for digital audio applications.
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 12SF++
Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PIPE int…
In order to achieve higher throughput, the turbo decoder uses up to 8-parallel MAP decoder.
On the transmitter side, the PHY layer receives its inputs from the Media Access Control (MAC) layer.