Macnica
•
HQ:
USA
High-speed serial interface compliant with V-by-One® HS plus standard IP core for FPGAs that supports “V-by-One® HS plus Standard…
- V-By-One
Compare 8 Macnica IP Cores from 1 vendors
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V-by-One® HS Tx IP / V-by-One® HS Rx IP
Macnica• HQ: USAHigh-speed serial interface compliant with V-by-One® HS standard V-by-One® HS IP is an IP to achieve V-by-One HS high-speed video…
- V-By-One
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MECHATROLINK-III Master/Slave IP
Macnica• HQ: USAMECHATROLINK-III Master/Slave IP together with CPU communicates with the products adapting.
- UART
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Macnica• HQ: USA
Next-generation CMOS image sensor interface, SLVS-EC v3.0, is implemented in FPGAs SLVS-EC v3.0 Rx IP is an interface IP core tha…
- SLVS-EC
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Macnica• HQ: USA
Video transfer over IP, Supports PTP SMPTE ST 2059 is a standard for synchronization of video equipment over an IP network.
- IEEE-1588 / PTP
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ION 64b66b IP (64b/66b High-speed Serial Interface)
Macnica• HQ: USAHigh-speed serial interface achieved using a lightweight protocol ION 64b66b is an IP for high-speed serial interface targeting a…
- Channel Coding
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ION 8b10b IP (8b/10b High-speed Serial Interface)
Macnica• HQ: USAHigh-speed serial interface achieved using a lightweight protocol ION 8b10b is a high-speed serial interface targeting applicatio…
- Channel Coding
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Macnica• HQ: USA
Next generation CMOS image sensor interface SLVS-EC is the next-generation, high-speed interface for high-resolution CMOS image s…
- SLVS-EC