Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Enhancement) Logic Process
- UMC
- 110nm
- HS
Faraday Technology Corporation is a leading fabless ASIC and silicon IP provider. The company's broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDRI/II/III, MPEG4, H.264, USB 2.0/3.0, 10/100 Ethernet, Serial ATA, and PCI Express, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. Faraday is listed in Taipei Stock Exchange, ticker 3035.
Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Enhancement) Logic Process
UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process
DLL-based LVDS RX,VCC=3.3V for 11.5MHz ~ 34.6MHz operation frequency, UMC 0.13um HS FSG Logic Process
DLL-based LVDS RX; VCC=3.3 for 20M~135MHz and VCC=2.5 for 20M~100MHz operation freq.
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad.
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad.
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process
Low power LVDS Receiver IO 50Mbps; UMC 0.11 um Logic HS/FSG (Cu) Process
Low power LVDS Receiver IO 50Mbps; UMC 0.11 um Logic HS/FSG (Cu) Process
Voltage mode 10/100 Base-TX/FX Energy Efficient Ethernet PHY; Support EtherCAT and cable diagnostic; UMC 0.11um HS/AE Logic Proce…
10BASE-T/100BASE-TX/100BASE-FX/1000BASE-T Gigabit Energy Efficient Ethernet PHY; UMC 28nm HPC+/LOW_K process
0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
10BASE-T/100BASE-TX/100BASE-FX Energy Efficient Ethernet PHY; UMC 28nm HPC/Low-K process
10BASE-T/100BASE-TX/100BASE-FX Energy Efficient Ethernet PHY; UMC 28nm HPC/Low-K process
40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process
40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process
LPDDR3-PHY Command/address block for LightCo ; UMC 40nm LP/RVT Logic Process
LPDDR3-PHY Command/address block for LightCo ; UMC 40nm LP/RVT Logic Process
40nm LPDDR2-PHY data block for SIP
40nm LPDDR2-PHY data block for SIP
40nm LPDDR2-PHY command/address block for SIP
40nm LPDDR2-PHY command/address block for SIP
40nm LP DDR3/4 LPDDR23 COMBO PHY DATA Block for Flip Chip usage
40nm LP DDR3/4 LPDDR23 COMBO PHY DATA Block for Flip Chip usage
UMC 40nm LP process DDR34/LPDDR23 COMPENSATION Block with 2.5V Device
UMC 40nm LP process DDR34/LPDDR23 COMPENSATION Block with 2.5V Device
DDR34 COMBO PHY ADDR Block for Solder bump Flip chip version ;UMC 40nm LP/RVT Logic Process
DDR34 COMBO PHY ADDR Block for Solder bump Flip chip version ;UMC 40nm LP/RVT Logic Process
DDR3/DDR3L/LPDDR2 combo PHY ( not support DDR3 leveling function), data block;UMC 40nm LP/RVT LowK Logic Process .