Algotronix specialises in encryption IP cores and cryptographic protection of design intellectual property. Our customers include many of the largest defense corporations worldwide as well as government departments and companies in the networking, test equipment and gaming industries. Algotronix encryption IP cores are used in equipment deployed by several NATO countries.
Algotronix' philosophy is quality over quantity: rather than building a wide range of IP cores we set out to do a small number of carefully chosen cores very well. We have initially focussed on the Advanced Encryption Standard algorithm and worked hard to make sure that our cores provide the highest levels of performance and area efficiency coupled with great flexibility in implementation options to ensure a good match to customer application requirements.
AES Based Random Number Generator Core
A random number generator core suitable for cryptographic applications such as producing keys and other critical security paramet…
Ultra high performance AES-GCM for OTN networks
This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and can be configured for perfo…
AES Core GCM for 10Gbit/sec packet data
This state of the art implementation of AES-GCM achieves 10Gbit/sec performance under worst case traffic conditions on Virtex 5 F…
The NIST Validated (cert # 953) G3 AES core family is the third generation of Algotronix' AES technology.
The G2 AES encryption core represents the second generation of Algotronix' AES technology: it is a stable, NIST validated impleme…
This IP core implements the Kuznyechik cipher of the Russian Federation GOST 3412-2015 standard (also available in English as RFC…
IEEE 802.1ae MACSEC IP Core for 40 Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
This configurable implementation of the XTS-AES algorithm for storage encryption implements the full NIST SP800-38E specification…
This implementation of the AES-CCM algorithm implements the full NIST draft SP800-38C specification.
This configurable implementation of the AES-GCM algorithm implements the full NIST draft SP800-38D specification.
This is a high performance pipelined implementation of AES optimized for encryption of uncompressed video on low cost FPGA famili…
IEEE 802.1ae MACSEC IP Core for 10 Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
Multiple SecY IEEE 802.1ae MACSEC IP Core for 40Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
AES-GCM IP Core for 40Gbit/sec packet data
This state of the art implementation of AES-GCM achieves 40Gbit/sec performance on Virtex 5 FPGAs.
Duplex AES-GCM at 10Gbit/sec for OTN
This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and achieves 10Gbit/sec perform…
This core extends the Algotronix G3 Encryption Standard (AES) core by providing a secure, standardized method for loading cryptog…
ZUC (128-EEA3 and 128-EIA3) Core
This IP core implements the ZUC stream cipher and the 128-EEA3 encryption and 128-EIA3 authentication algorithms based on it whic…
This IP core implements the SHA-1, SHA-256, SHA-384 and SHA-512 algorithms specified in FIPS180-4 which are widely used for authe…
IPSEC (RFC 4303) 1Gbit IP Core
The IPSEC core is a high performance pipelined implementation of the Encapsulating Security Protocol mode of IPSEC (RFC4303) with…