Vendor: Soft Mixed Signal Corp. Category: Single-Protocol PHY

USB 2.0 Device Transceiver

USB 2.0 DEVICE Transceiver is a fully integrated PHY Core which is a super-set of DEVICE PHY with High Speed (HS), Full-Speed (FS…

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USB 2.0 View all specifications

Overview

USB 2.0 DEVICE Transceiver is a fully integrated PHY Core which is a super-set of DEVICE PHY with High Speed (HS), Full-Speed (FS) and Low-Speed Transceivers and is compliant with the USB 2.0 and USB 1.1 Specifications. It includes Clock/Data Recovery, on-chip PLL, Integrated & Calibrated Termination and Pull-Up Resistors with full Analog Transceiver functionality for the Complete USB 2.0 PHY as illustrated in the figure. USB2 DEVICE Transceiver has standard UTMI so that ASIC vendors are isolated from the high speed and analog circuitry associated with the transceiver, thus reducing the design risk and speeding the design cycle.

The core’s main blocks are clock/data recovery for FS/HS, PLL, transceiver state machines, data encoder/decoder and high-speed analog transceiver as can be seen in the main block diagram above.

Key features

  • Fully compliant with latest USB2.0 spec version 2.0.
  • Innovative technique for clock recovery from 480 Mbps data.
  • High frequency PLL.
  • Advanced high-speed transmitter and receiver.
  • Support High Speed HS and Full Speed FS modes. Interface with standard SIE (Serial Interface Engine).
  • Integrated High Precision Termination resistors.
  • Legacy USB 1.1 Interface

Block Diagram

SMS2100 block diagram

Specifications

Identity

Part Number
SMS2100
Vendor
Soft Mixed Signal Corp.
Type
Silicon IP

Standards & Interfaces

Supported Standards
USB 2.0

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Soft Mixed Signal Corp.

Learn more about Single-Protocol PHY IP core

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Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

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Frequently asked questions about Single-Protocol PHY IP

What is USB 2.0 Device Transceiver?

USB 2.0 Device Transceiver is a Single-Protocol PHY IP core from Soft Mixed Signal Corp. listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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