USB 2.0 Controller
Mature controller solution for OTG and Device applications
Overview
Mature controller solution for OTG and Device applications
The Cadence® USB 2.0 Controller IP products have been available since 1999, are silicon-proven, and have been extensively validated with multiple hardware platforms. The flexible architecture of Cadence USB 2.0 Controller IP was developed with faster time-to-market in mind and can be easily integrated with our USB 2.0 PHY IP. Our USB 2.0 Controller IP includes 2.0 On-The-Go (OTG) and Device controllers.
Key features
- Support for Link Power Management (L0 through L3)
- Scatter-gather DMA with Arm® AMBA® AXI interface
- Up to 8 IN and 8 OUT configurable endpoints
- Supports Attach Detection Protocol
Block Diagram
Benefits
- Complete Solution: Complete solution including low level driver - Reducing application development time
- High Level of Configurability: Better fit for different application needs
- Industry-Standard Interfaces: Simplify system integration
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about USB IP core
USB Type-C: Let's Get Real
Securing the Most Important Goal of USB Type-C Technology: A Better User Experience
Designing USB 3.1? You Need Sigrity 2016
Word from the Source - USB-IF on USB Type-C Quality and Interoperability (Jeff Ravencraft Interview - Part 3)
Word from the Source - USB-IF on USB Type-C and Alternate Modes (Jeff Ravencraft Interview - Part 2)
Frequently asked questions about USB IP cores
What is USB 2.0 Controller?
USB 2.0 Controller is a USB IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.
How should engineers evaluate this USB?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this USB IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.